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800G/400G Ethernet Solutions for Networking and Chiplets

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800G/400G Ethernet Solutions for Networking and Chiplets
800G/400G Ethernet Solutions for Networking and Chiplets

Overview

Ethernet has been used as a mainstream solution for chip-to-chip and die-to-die connectivity. In this webinar, we will review some of the key required features of Ethernet MAC/PCS from 800G down to 10G. We will address various types of Forward Error Correction engines (FEC) to improve the BER of the channel/links. We will analyze how the latest advances in packaging technology have allowed moving the ethernet functions from the main die to chiplets simplifying the system and improving the cost/power/performance of the overall solution.

Key Learnings

Chip-to-Chip connectivity using Ethernet, improving link error rates and packaging technology

Target Audience

Designers, Architects, Marketing, Package engineers

Speakers

Ketan Mehta, Sr. Director, Product/Application Marketing, Interface IP

As the Sr. Director of Interface IP at OpenFive, Ketan Mehta is responsible for HBM Memory, Interlaken, Ethernet, Die-to-Die links, and other high-speed interfaces. With over 25 years of experience in engineering, product planning and marketing, Ketan has a rich background in IP connectivity solutions for various applications including high performance computing (HPC), AI, networking, data center, and storage. He received his M.S. degree in electrical engineering from The University of Texas at San Antonio, and his MBA from San Jose State University.

Moderator

Overview

Ethernet has been used as a mainstream solution for chip-to-chip and die-to-die connectivity. In this webinar, we will review some of the key required features of Ethernet MAC/PCS from 800G down to 10G. We will address various types of Forward Error Correction engines (FEC) to improve the BER of the channel/links. We will analyze how the latest advances in packaging technology have allowed moving the ethernet functions from the main die to chiplets simplifying the system and improving the cost/power/performance of the overall solution.
Webinar Image 800G400G Ethernet Solutions for Networking and Chiplets

Key Learnings

Chip-to-Chip connectivity using Ethernet, improving link error rates and packaging technology

Target Audience

Designers, Architects, Marketing, Package engineers

Speakers

Ketan Mehta, Sr. Director, Product/Application Marketing, Interface IP

As the Sr. Director of Interface IP at OpenFive, Ketan Mehta is responsible for HBM Memory, Interlaken, Ethernet, Die-to-Die links, and other high-speed interfaces. With over 25 years of experience in engineering, product planning and marketing, Ketan has a rich background in IP connectivity solutions for various applications including high performance computing (HPC), AI, networking, data center, and storage. He received his M.S. degree in electrical engineering from The University of Texas at San Antonio, and his MBA from San Jose State University.

Moderator

Register

We encourage you to invite your friends and colleagues for attending this webinar.

Thursday, Mar 04
04:00 pm Pacific Standard Time
San Francisco
Thursday, Mar 04
04:00 am European Standard Time
San Francisco1
Friday, Mar 05
05:00 pm China Standard Time
Beijing

Overview

Ethernet has been used as a mainstream solution for chip-to-chip and die-to-die connectivity. In this webinar, we will review some of the key required features of Ethernet MAC/PCS from 800G down to 10G. We will address various types of Forward Error Correction engines (FEC) to improve the BER of the channel/links. We will analyze how the latest advances in packaging technology have allowed moving the ethernet functions from the main die to chiplets simplifying the system and improving the cost/power/performance of the overall solution.

Key Learnings

Chip-to-Chip connectivity using Ethernet, improving link error rates and packaging technology

Target Audience

Designers, Architects, Marketing, Package engineers

Speakers

Ketan Mehta, Sr. Director, Product/Application Marketing, Interface IP

As the Sr. Director of Interface IP at OpenFive, Ketan Mehta is responsible for HBM Memory, Interlaken, Ethernet, Die-to-Die links, and other high-speed interfaces. With over 25 years of experience in engineering, product planning and marketing, Ketan has a rich background in IP connectivity solutions for various applications including high performance computing (HPC), AI, networking, data center, and storage. He received his M.S. degree in electrical engineering from The University of Texas at San Antonio, and his MBA from San Jose State University.

Moderator

800G/400G Ethernet Solutions for Networking and Chiplets

Overview

Ethernet has been used as a mainstream solution for chip-to-chip and die-to-die connectivity. In this webinar, we will review some of the key required features of Ethernet MAC/PCS from 800G down to 10G. We will address various types of Forward Error Correction engines (FEC) to improve the BER of the channel/links. We will analyze how the latest advances in packaging technology have allowed moving the ethernet functions from the main die to chiplets simplifying the system and improving the cost/power/performance of the overall solution.

Key Learnings

Chip-to-Chip connectivity using Ethernet, improving link error rates and packaging technology

Who should attend?:

Designers, Architects, Marketing, Package engineers

Speakers

Ketan Mehta, Sr. Director, Product/Application Marketing, Interface IP

As the Sr. Director of Interface IP at OpenFive, Ketan Mehta is responsible for HBM Memory, Interlaken, Ethernet, Die-to-Die links, and other high-speed interfaces. With over 25 years of experience in engineering, product planning and marketing, Ketan has a rich background in IP connectivity solutions for various applications including high performance computing (HPC), AI, networking, data center, and storage. He received his M.S. degree in electrical engineering from The University of Texas at San Antonio, and his MBA from San Jose State University.

Moderator

REGISTER

This webinar is offered at three different times. Register for the time that works best for you.

Thursday, Mar 04
04:00 pm Pacific Standard Time
San Francisco Pacific Standard Time

Register Now

Thursday, Mar 04
04:00 am European Standard Time
San Francisco1 Pacific Standard Time

Register Now

Friday, Mar 05
05:00 pm China Standard Time
Beijing Pacific Standard Time

Register Now

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