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Chip-to-Chip Communication (Interlaken-LL) for Enterprise and Cloud

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Chip-to-Chip Communication (Interlaken-LL) for Enterprise and Cloud
Chip-to-Chip Communication (Interlaken-LL) for Enterprise and Cloud

Overview

Interlaken chip-to-chip connectivity IP has been used for many years in networking and switching fabrics to move high throughput data between large chips. With advanced technology nodes, increasing chip sizes, and CPU cluster-based designs, Interlaken has found a unique spot as the protocol of choice for low latency, high throughput chip-to-chip connectivity. SiFive is extending its 8th generation of Interlaken IP with the introduction of Interlaken-Low Latency (LL) IP, which will enable low latency chip-to-chip connectivity in HPC, AI/ML, enterprise, and cloud applications. Interlaken-LL IP can provide up to 256Gbps of reliable and scalable throughput between two chips; whereas the standard Interlaken IP from SiFive provides throughput of up to 1.2Tbps.

Key Learnings

How SiFive’s Interlaken-Low Latency (LL) IP is enabling low latency chip-to-chip connectivity in HPC, AI/ML, enterprise, and cloud applications.

Target Audience

Designers, Architects, Marketing

Speakers

  • Ketan Mehta, Director, SoC IP Product Marketing, OpenFive
  • Sundeep Gupta, Senior Director – Engineering, OpenFive

Moderator

Daniel Nenni, Founder of SemiWiki.com

Overview

Interlaken chip-to-chip connectivity IP has been used for many years in networking and switching fabrics to move high throughput data between large chips. With advanced technology nodes, increasing chip sizes, and CPU cluster-based designs, Interlaken has found a unique spot as the protocol of choice for low latency, high throughput chip-to-chip connectivity. SiFive is extending its 8th generation of Interlaken IP with the introduction of Interlaken-Low Latency (LL) IP, which will enable low latency chip-to-chip connectivity in HPC, AI/ML, enterprise, and cloud applications. Interlaken-LL IP can provide up to 256Gbps of reliable and scalable throughput between two chips; whereas the standard Interlaken IP from SiFive provides throughput of up to 1.2Tbps.
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Key Learnings

How SiFive’s Interlaken-Low Latency (LL) IP is enabling low latency chip-to-chip connectivity in HPC, AI/ML, enterprise, and cloud applications.

Target Audience

Designers, Architects, Marketing

Speakers

  • Ketan Mehta, Director, SoC IP Product Marketing, OpenFive
  • Sundeep Gupta, Senior Director – Engineering, OpenFive

Moderator

Daniel Nenni, Founder of SemiWiki.com

Register

We encourage you to invite your friends and colleagues for attending this webinar.

Overview

Interlaken chip-to-chip connectivity IP has been used for many years in networking and switching fabrics to move high throughput data between large chips. With advanced technology nodes, increasing chip sizes, and CPU cluster-based designs, Interlaken has found a unique spot as the protocol of choice for low latency, high throughput chip-to-chip connectivity. SiFive is extending its 8th generation of Interlaken IP with the introduction of Interlaken-Low Latency (LL) IP, which will enable low latency chip-to-chip connectivity in HPC, AI/ML, enterprise, and cloud applications. Interlaken-LL IP can provide up to 256Gbps of reliable and scalable throughput between two chips; whereas the standard Interlaken IP from SiFive provides throughput of up to 1.2Tbps.

Key Learnings

How SiFive’s Interlaken-Low Latency (LL) IP is enabling low latency chip-to-chip connectivity in HPC, AI/ML, enterprise, and cloud applications.

Target Audience

Designers, Architects, Marketing

Speakers

  • Ketan Mehta, Director, SoC IP Product Marketing, OpenFive
  • Sundeep Gupta, Senior Director – Engineering, OpenFive

Moderator

Daniel Nenni, Founder of SemiWiki.com

Chip-to-Chip Communication (Interlaken-LL) for Enterprise and Cloud

Overview

Interlaken chip-to-chip connectivity IP has been used for many years in networking and switching fabrics to move high throughput data between large chips. With advanced technology nodes, increasing chip sizes, and CPU cluster-based designs, Interlaken has found a unique spot as the protocol of choice for low latency, high throughput chip-to-chip connectivity. SiFive is extending its 8th generation of Interlaken IP with the introduction of Interlaken-Low Latency (LL) IP, which will enable low latency chip-to-chip connectivity in HPC, AI/ML, enterprise, and cloud applications. Interlaken-LL IP can provide up to 256Gbps of reliable and scalable throughput between two chips; whereas the standard Interlaken IP from SiFive provides throughput of up to 1.2Tbps.

Key Learnings

How SiFive’s Interlaken-Low Latency (LL) IP is enabling low latency chip-to-chip connectivity in HPC, AI/ML, enterprise, and cloud applications.

Who should attend?:

Designers, Architects, Marketing

Speakers

  • Ketan Mehta, Director, SoC IP Product Marketing, OpenFive
  • Sundeep Gupta, Senior Director – Engineering, OpenFive

Moderator

Daniel Nenni, Founder of SemiWiki.com

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