使用Die-to-Die和LPDDR子系统的可扩展HPC平台和内存扩展技术
通过先进的封装和接口解决方案，可以连接多个CPUClusters (近或远)，并在它们之间共享外部内存资源。我们将审查构建这样一个平台所需的IP，并推荐可以从中受益的应用程序。
2.5D 定制 SoC 和芯片在人工智能和高性能计算应用方面的兴起
2021 年有望成为突破性的一年，基于2.5D的定制 SoC 和芯片将在提高Cloud/AI性能, HPC, networking 和 storage applications方面发挥非常重要的作用。
800G/400G Ethernet Solutions for Networking and Chiplets
Ethernet has been used as a mainstream solution for chip-to-chip and die-to-die connectivity. In this webinar, we will review some of the key required features of Ethernet MAC/PCS from 800G down to 10G.
The Emergence of 2.5D Custom SoCs and Chiplets in AI and HPC Applications
2021 promises to be the breakthrough year when 2.5D based custom SoCs and chiplets will play a very prominent role in turbo-charging cloud/AI, HPC, networking and storage applications.
Chip-to-Chip Communication (Interlaken-LL) for Enterprise and Cloud
Interlaken chip-to-chip connectivity IP has been used for many years in networking and switching fabrics to move high throughput data between large chips. With advanced technology nodes, increasing chip sizes, and CPU cluster-based designs, Interlaken has found a unique spot as the protocol of choice for low latency, high throughput chip-to-chip connectivity. SiFive is extending […]
Enabling AI Vision at the Edge
AI technology has enabled electronic devices with the ability to not only see, but also understand the world around it. It enables a wide range of applications such as; self driving cars, automated delivery robots drones, smart cities, augmented reality, intelligent home assistants, and much more. All of these require purpose-built SoCs to provide the […]
Protocol Agnostic Die-to-Die Connectivity for Chiplet and HPC
With recent advances in packaging technology, it is possible to connect multiple dies on a single package. OpenFive’s D2D Controller provides end to end connection from one die to another. In this webinar, we will review the trade-offs between various connectivity options. We will also review the application of D2D in Chiplets and HPC to […]
SiFive HBM2/2E IP Subsystem – Features and Implementation – OpenFive
In this webinar you will learn more about the features of the HBM2/2E IP subsystem and how to implement the IP in an SoC. We’ll also address the market applications for HBM2/2E IP. OpenFive’s HBM2/2E IP subsystem solution is architected and designed to provide the highest performance and flexibility for integrating high bandwidth memory (HBM) […]
SiFive Storage Solutions: How RISC-V and Custom Silicon Platforms Enable Smart Storage Architectures
Currently, there is a huge demand in the market for storage systems. Reliability, high endurance and robustness are the essential features, which are very much required for such systems. Therefore, SSD controller-based storage solutions are most preferred for data centers.
SiFive USB 3.2 IP Solutions Including Retimer for High-Speed Consumer Applications
Join us in this webinar to learn more about our USB 3.2 IP solution, including Retimer, for high-speed consumer applications. We will review the IP engineering features, operations, configurations, protocols and implementation guidelines in detail.
